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JUN. 15,1981 



TR-808 



TR-808 [SERVICE NOTES 



SPECIFICATIONS 

Rhythm storage capacity 1-32 steps/measure 64 measures x 12 tracks 

Tempo variable range 4M =40-300 

Master output Hi 6V p-p/1 Kfi; Lo 0.6V p-p/3Ki7 

(Level: Voices @ red mark; AC @ FCW) 

Multi output 1 Kfi 

Trigger output +15V, 20ms; IK^ -CB/CP(MA)/AC- 

Accent level OdB-lOdB 

Power consumption 8W 

Dimensions 508 (w) x 305 (d) x 110 (h) mm 

Net weight 5kg 



CAUTION 

Although some parts are designated in abridged number or numberless in this limited space, they are 
fully numbered on the Parts List. 

Parts order must be written in full number followed by the part name to encourage prompt, 
accurate dispatch. 



TOP PANEL REMOVAL SCREWS: (T) - 

DUST COVER N-102 



SWITCH SQPR24-12P 



First Edition 

Second Printing (July 12, 1983 E2) 



KNOB N-128 



SWITCH SRM-IOIC 








BUTTON N-506 BLACK 






ill 


PANEL N-242 


SIDE PANEL N-118 (L) 




i^-y- 


KNOB N-128 


^ 


SWITCH SRM1026 



(T) -(g) 3 X 10 mm B1, Fe, Br, Biding, Self tapping 
(5) -(7)3x6 mm Fe, Br Binding 



FLEXIBLE PCB N-166 








SHIELD COVER N-162 
BOSS NUT N-524 3 x 8mm 


HOLDER N-247 








SWITCH BOARD ASS'Y 0P31 16-090 








MAIN BOARD ASS'Y 0P31 16-130 |B 




B|M[iMB| 


s 


H^^^^Hb voicing BOARD ASS'Y VG31 16-140 


^» 


fef 


^9h 



HOLDER N-246 



SWITCH 



SDG5P001 100V 



SDG5P001 117V 



SDG5P502 220V 240V 



POWER TRANSFORMER 



N-217N 100V 



N-218C 117V 



N-219D 220V 240V 



LONG NUT N-503 3 x 18mm 



TERMINAL N-101 TT501 D-1 2P 



POT EVH-LWAD25B55 500KB 




TOP PANEL REMOVAL SCREWS 
1 through 10 



Roland 



(3rd Printing June 1986 C-2) Printed in Japan AE2 1 



JACK BOARD (A) ASS'Y 0P31 16-100 



fc«'.WJS 



JACK BOARD (B) ASS'Y OP3116-110 




HOLDER N-248 



^^ 



BATTERY HOLDER N-525 



POWER SUPPLY BOARD ASS'Y 



0P31 16-051 100V/117V 



0P31 16-054 220V/240V 






LONG NUT N-501 3x 10mm 



CHASSIS N-234 



RUBBER FOOT 0-7(111-023) 



COIN SCREW 3x8mm 




lilHMHiliHHl 



RUBBER FOOT G-5 (111-021) 



BATTERY COVER N-159 



CUSHION N-310 



SCREWS (8) - (@ 3 X 6 mm B1, Fe, Br Binding, Self tapping 
SCREWS @-@ 3x10 mm B1, Fe, Br Binding, Self tapping 



JACK SG7622 #8(13449106) 







8) (^ 

DIN CONNECTOR TCS0250-01 -03 (13429604) 
SWITCH SSF22-07 (13159112) 




TR-808 



JUN. 15, 1981 



(Top VievV; 



A. 


— 


1 


-vy- 


18 




As 




2 




17 




A4 




3 




16 




A3 




4 




15 




Ao 




5 




14 




Ai 




6 




13 




A2 


I 


7 




12 




CS 




8 




11 




GND 


— 


9 




10 





Vcc 
Ar 
Af 
A9 
I'Oi 
I O2 
I O3 
I Oi 

We 



HIV14334P-4. 

1 024-word X 4-bit Static CMOS RAM 



A3 

As 
Ab 
A: 

As 



lOi 
I O2 
I O3 
I O4 



7^ 






;^ 



I 



CS 



WE 



ROW 
SELECT 



MEMORY ARRAY 

64 ROWS 

64 COLUMNS 






INPUT 

DAH 

CONTROL 



1^ 



\'cc 
GND 



SENSE SWITCH 



COLUMN SELECT 



MM 

Ao Ai A2 A9 




t''^) 



'^^^^ ^■~ <^^a 



Tao^i 



Mn n n n n n n 



c - + -yo mo^y 
(D ® 

BA662 






jtnytnTarnjj 
MC14001BCP 

Quad 2-lnput NOR Gate 




IN 
^W - + 

o n n n n 



w^ 



m 



u u u u 



- +_ 



<JV 



TC4011BP 

Quad 2-lnput NAND Gate 



IN 
/^PC4558C 



TA7179P 



DUAL ±15V TRACKING RAGULATOR 







VOLTAGE 


GND li 


\j 


"?1 ADJUST 


BALANCE 5 




5 NC 


+ COMPEN D 




ff - COMPEN 


+ SENSE S 




S - SENSE 


+ VOUT 5 




n - VOUT 


NC U 




D NC 


VCC Q_ 




n VEE 



Heg.IN = 5raV(typ)(VIN.=i8-30Vj 
Reg,OUT= 5mV(typ)(IOUT=0-50mA} 

Ripple rejection ratio = 'f5dB 

Output current = 100mA (max) 



-u 

-r-i 


2 
3 

I 




r OUTPUT 
— - -^ --». 


( - 




^ ^»_/H/IIVHJIM 


( - 


— =< 




{ ^ ==». 




V 








^ INPUT 


ORDER INFORMATION 


OUTPUT 
VOLTAGE 


TYPE 


PART NO. 


5 V 


MA7805C 


MA7805UC 


6 V 


MA7806C 


/iA7806UC 


8 V 


MA7808C 


MA7808UC 


8.5 V 


MA7885C 


;iA7885UC 


12 V 


MA7812C 


MA7812UC 


15 V 


MA7815C 


MA7815UC 


18 V 


MA7818C 


;jA7818UC 


24 V 


MA7824C 


PA7824UC 



MA7800 SERIES 

3TERMINAL POSITIVE VOLTAGE 
REGULATORS 



ABSOLUTE MAXIMUM RATINGS 

Input Voltage (5 V through 18 V) 

(24 V) 
Internal Power Dissipation 
Storage Tennperature Range 
Operating Junction Temperature Range ;iA78O0 

/iA7800C 
Lead Tennperature (Soldering, 60 s time limit) TO-3 Package 

(Soldering, 10 s time limit) TO-220 Package 



35 V 

40 V 

Internally Limited 

-65°C to +150°C 

-55°C to +150°C 

0°C to +150''C 

300° C 

230''C 



HD14S84B 



Hex Schmitt Trigger 



MC14051B 

8-Channel Analog 
Multiplexer/Demultiplexer 



H- 
E- 



E 



"V^ 



[T-^x^ 



AN69I2 

Quad 
Comparator 




BLOCK DIAGRAM 




Vdd ' P'" 14 



-f^>o — loj 



I}" 








feo- 


Inhibit 




,.. J 


110 — ■ 


A 






lOO — 


B 






9 O 


C 






'l3 0— 


XO 






140 


XI 
X2 


X 


tches < 


120 


X3 




Oi/t 


10 


X4 






50 


X5 






20 


X6 






40 


X7 






1 





VDD ' f^in lb 
Vss = Pin 8 
Vee - Pin 7 



TRUTH TABLE 



Control Inputs 






1 


Inhibit 


Select 


ON Switches | 


C* B A 


MC14051B 


MC14062B 


WIC14053B 









1 
1 
1 1 


XO 
X1 
X2 
X3 


YO XO 
Y1 XI 
Y2 X2 
Y3 X3 


ZO YO XO 
ZO YD XI 
ZO Y1 XO 

ZO Y1 xr 








1 
1 1 
1 1 

1 1 1 


X4 
X5 
X6 
X7 




ZI YO XO 

ZI YO XI 
21 Y1 XO 
ZI Y1 XI 


1 


X X X 


None 


None 


None 



Not applica 
• Don't Ca 



MC14051B FUNCTIONAL DIAGRAM 



16 oVqd 



8 6 Vss 



7 Jv 



3inary to loi 
Decoder w 
Inhibit 



th 



MC14013B 



DUAL TYPE D FLIP-FLOP 



TRUTH TABLE 



INPUTS 


OUTPUTS 1 


CLOCK* 


DATA 


RESET 


SET 





Q 


_/~ 














1 


_y~ 


1 








1 





~\_ 


X 








Q 


Q 


X 


X 


1 








1 


X 


X 





1 


1 





X 


X 


1 


1 


1 


1 



X " Dont Cue 
t - Level Change 



JUN. 15, 1981 

TR-808 CIRCUIT DESCRIPTION 



TR-808 



TEMPO 
CLOCK 



EMPo L 



T. FF 






INTEEEUPT 
CLOCK 



<.TBP LEDa 
STEP 5W/^ 




JI 



II 



PUMCT'OU 



Jl 






b 



p^ 



PB 



PI I 



PH 

CPU 

PC 



CPU cLOci; 



TRI6<5-Ee 
MDWO MC/LTI 



PECODEZ 



1 



f; 



TlCCEA/r 



([ N j^ MEMORY 



APDJ tESS 
-1^ 



b 



PIN CONNECroe 






^/ite 






Thick line indicates 
CPU controlled circuits, 
thin line Voicing. 



f 



& HflSTEe OUT 



MULTI OUT 
^ M Kl N <% 



FIGURE 1 BLOCK DIAGRAM 



MPD650C-085 FUNCTIONAL DESCRIPTION 





No. 




PH 





26 








(PortH) 


1 


27 


Scanning signal outputs to switches 








2 


28 


Switching signal outputs to STATUS BUFFER & 


GATE 




3 


29 








PA 





33 








(Port A) 


1 


34 


Switch scanning signal inputs 








2 


35 


STATUS (TEMPO. CLOCK. START/STOP. 


FILL 


IN) inputs 




3 


36 








PB 





37 








(Port B) 


1 
? 


38 
39 


Inputs from STEP Switches (RHYTHM SELECT 


Swtiches) 




3 


40 








PG 





22 








(PortG) 


1 
2 
3 


23 
24 
25 


Drive signals to STEP LEDs 






PE 





12 


1st/2nd 


CP 




(Port E) 


1 


13 


A/B 


RS 






2 


14 


Memory bank 


HT 






3 


15 


select 

MEMORY ADDRESSES 


MT 
CH 


INSTRUMENT DATA 


PD 


n 


R 


(Port D) 


1 

2 


9 
10 


Dk,,+i,„ These pins use CE from 
nnluZ ADDRESS Decoder to 
numoers select cells in RAM to 


OH 
CY 


These data need 
COMMON TRIG to 




trigger Sound Generators 




3 


11 


be accessed 


CB 
LT 


being designated 


PF 





16 


(Port F) 


1 


17 


Step 


SD 






2 


18 


numbers 


BD 






3 


19 




AC 




PC 





2 








(Port C) 


1 
2 
3 


3 
4 
5 


Data Inputs/Outputs 






PI 





30 


Memory WE 






(Port 1) 


1 


31 


Memory CE (associated with PE-2, 3 at ADDRESS 


DECODER) 




2 


32 


Trigger Pulse (INSTRUMENT) output 







General 

As can be seen from the block diagram, most processes of TR-808 up 
to generation of pulses triggering sound generators are controlled by 
the computer. CPU pin functions are as shown at the lower left table. 

Once power is turned on for TR-808, pulses are generated from PI-2 
of CPU regardless of TR-808 function mode (Start/Stop) and of 
presence or absence of rhythm patterns. The time length between 
the pulses is equal to that of the shortest rhythm patterns. The pulse 
is transfered to TRIGGER MONO, then ACCENT from which it is 
applied in parallel to all the gates prestaged to Sound Generators; 
accordingly, called COMMON TRIGGER. On the other hand, instru- 
ment data designating sound to be outputted are independently 
supplied to the gates from corresponding exclusive ports (PD, PE 
and PF). Since Instrument data are time sharing the data buss with 
memory addresses, the data are aligned with Common Trigs in timing. 
When these two signals are applied, the gate ANDs the two signals 
and outputs a signal triggering the sound generator. Since the peak 
value of this trig signal is in proportion to that of the 
Common Trig pulses, when an accent data is outputted, the data 
can be used to change the amplitude of the Common Trig signal. 

Panel control settings are read by interruption of CPU each time 
an interrupt signal is fed to the INT terminal. First, the Buffer & 
gate turns on by a signal from PH, and the status is read through PA. 
Then, some statuses of function switches are read through PA by 
a signal from one port of PH. At the same time, some statuses of a 
group of step switches are read through PB, and the step LED drive 
signa l is outputted from PG as required. Statuses are read each time an 
INT signal is fed. However, statuses of the step and function switches 
are read every four times of INT signals. 

Four CMOS RAMs (IK x 4-bit) are used for data storage. Chips are 
selected when the upper two bits of PE data decoded by IC5 are 
enabled by pulses from PI-1. Addresses of chip memory cells are 
designated by bits of PD, PE and PF. Data storage to addresses are 
possible when an L output from PI-0 is applied to WE . 

Detail 

SW Scanning, Status Reading 

Reading of statuses of the controls on the panel (step switches, 
function switches, tempo, etc.) starts when an interrupt signal is 
applied to INT terminal every 1.9ms. When the signal is applied to 
INT terminal, CPU starts interruption. The interruption period is 
approx. 600)Us. During the first 150ms, PH0-PH3 become H, and 
the colle"ctor of AND gate Q18 becomes L. STATUS signals are 
ANDed with this L by IC3 and read through PA. After 150axs, only 
PH-0 becomes L. This signal is converted to H by Q23, and reaches 
PB and PA through the closed contacts of the Step switches (No. 1 — 
No. 4), SWla (Mode) and SW2 (Clear). When one of the four Step 
switches is closed, the corresponding STEP LED lighting signal is 
immediately fed from PG. Since the PG output is latched until the 
next INT signal is applied, the lighting period is approx. 1.8ms. This 
period b is approx. 450jus. The remaining period c is for processing 
of main program. When the next INT signal is applied, PHO— PH3 
become H again, the statuses of the TEMPO CLOCK, START/STOP, 
TAP, etc. are read again. Then, only PHI becomes L and the statuses 
of switches connected to the collector of 024 are read. At the next 
INT signal, STATUS and PH2 become L. Next, PH3 becomes L. 
This change is repeated. In this way statuses are checked each time an 
INT signal is applied every 1.9ms so that the CPU can respond to the 
status change promptly. The statuses of other switches are read every 
four times of INT signals. This corresponds to one reading every 
7.6ms. 



INTEREUPT 
CLOCK 
ICl pin 6 


— 


1,9ms 












— 










PHO 
PHo 






7. 6ms 






- 






















active low 



STEP 1-4 

MODE 

CLEAR 



STEP 5-8 
PRESCALE 
BASIC VARI, 



STEP 9-12 
INSTR. SELECT 
INSTRUMENT 
SELECT 



STEP 13-16 
AUTO FILL IN 
I/F VARIATION 



TEMPO CLOCK 
START /ST OP 
TAP 



FIGURE 2 
INTERRUPT CYCLE 
TIMING DIAGRAM 



INTERRUPT 
CLOCK 




























PH 


a 


' b ^ 






450;is 




STATUS 
GATE 








, 





All time lengths 
are approximate. 



15Q)as 



Ql8 




rrr 



START/STOP 



RESET & 
START 



TEMPO 
CLOCK 






IC3 



FIGURE 3 

SCANNING] SIGNAL FLOW 




PG 
outputs 



1.8ms 



TR-808 



JUN.15,1981 



PCo 

PC, 



CPU 



I 



R85-R88 
— ^AV 



^FD4^C 



^vw 



■^Wv- 



-AW- 



■m- Ttr rrr 



FIGURE 4 

RAM MEMORY MAP 



COW_ BELL 

CYMBAL 
OPEN HI^HAT_ 
CLOSED hi" HAT 



Ic 8 



MID TOM TOM 



HIGH TOM TOM 
RIM ^HOiy ~_' 
HAND CLAP " 



TcIO 



ACCENT 



BASS_DRl]M___ 
~_SNARE DRUM 
LOW TOM~TOM 



lc7 



RHYTHM TRACK 
RHYTHM PRESCALE 
RHYTHM STEP 



Icl 



CPU PI-]^ 
Memory CE 



lOus lOus lOus 
VALib ADbRESS 1 



READ CYCLE 



IC7-IC10 
pins 11-14 

PC 0-3 
Data read 



STOiRED DATA] 



-< — ^ 



WRIT^ CYCLE 



4 



PC 0-3 
Data write 



CPU PI-0_ 
Memory WE 



DATA in RAM 



WRITE DATA 




RAM, Address Decoder 

Four static CMOS RAMs (/iPD444C, 1 K x 4-bit) are used for memory. 
The memory map is shown in Fig. 4. 

The upper two bits PE2 and PES of CPU designate a RAM, IC5 
decodes these bits, and the memory select is enabled by a signal from 
PI-1 (CE).See Fig. 5. 

Cell addresses are designtated by bits from PD, PE and PF. After lO^us 
of CE, the data shown in Fig. 5-2 is read (5-3) or a new data from 
PC is written (Fig. 5-5). 

As can be seen from Fig. 5-2 and -4, during writing, PC output data 
and RAM data at the I/O ports of RAM may conflict with one 
another. To prevent this, the buffer resistors {R85— R88) are con- 
nected. 

The LED driver transistors (Q2-Q5) for BASIC VARIATION, 1ST 
and 2ND are directly connected to the bus of PD and PE. However, 
since various data appear on the bus by time sharing processing, the 
LEDs may sometimes light even when unnecessary signals are applied, 
resulting in possible lighting timing disparity in a mode. 

RAMs' low power consumption during high CE allows memories to 
be maintained for longer period with back-up battery. 



PI-2 

CPU pin_$2 



IC6 
pin 10 



PD 
PE 
PF 




STBLE 

INSTRUMENT 

DATA 



FIGURE 6 
TRIG-INSTRUMENT 



Trigger Gate 

Pulses corresponding to the shortest rhythm step usable by TR-808 
are fed from PI-2 of CPU at a time interval determined by the setting 
of TEMPO CONTROL (Fig. 6-1). On the other hand, instrument 
data to be reproduced are applied from PD, PE and PF to the gate 
of each sound generator in synchronization with step pulses (Fig. 6-3). 
Since the step pulse width of 10)Us is too narrow to trigger a sound 
generator, it is widened to approx. 1ms which is nearly equal to the 
width of instrument data signal. This widening is accomplished by 
the monostable IC6. It is triggered by a rising edge of Q27-inverted 
pulse. (Fig. 6-2). The L period is determined by the sum of the 
time constants of R 1 00 x C23 and R 1 02 x C27. 

The output from pin 10 of IC6 passes through the ACCENT circuit 
composed of 031 -034, becomes a COMMON TRIG signal, and 
simultaneously applied to the gates of all sound generators in parallel. 
When instrument data is present at a gate, this trigger signal is ANDed 
with the data and activates the corresponding sound generator (See 
Fig. 7). 

Since the AND output from the gate is in proportion to the amplitude 
of the common trig signal, the output of the sound generator has the 
amplitude in proportion to the common trig signal. Accordingly, 
when ACCENT data are present, they are added to the common trig 
signal. Since the output of pin 10 of IC6 is a negative logic signal, 
when there are no step pulses, the output signal becomes H, 031 
turns on and places a ground at base of 032. When pin 10 of IC6 
becomes L, 031 becomes off, and when ACCENT data from PF-3 
is L (no accent), 034 turns on to shunt VR3. As a result, the base of 
032 becomes approx. +5V and trig amplitude is approx. 4V. When 
ACCENT data is H, a voltage between 5V and 15V according to VR3 
setting is applied to the base of 032, and is converted into trig pulses 
of approx. 4-14V. This explains that ACCENT level can be changed 
by VR3. 

In the case of CB, CY, OH and CH, trig variation range is narrowed 
to 7V-14V by 1/2 IC2 (pins 1-3) on the voicing board to increase 
S/N ratio. 



DATA TIMING 



COMMON TRIG 



prestored 
FIGURE 5 READ/WRITE CYCLE TIMING 



new or refreshed 




Ims 

It" 



a 



ACCENT 



ACCENT 



FIGURE 7 VOICE GENERATOR TRIGGER PULSE 



JUN. 15, 1981 



TR-808 



START ON 



ANT I LOG 



Q16 




POWER ON RESET 
SWITCH 

FIGURE 8 START/STOP & TEMPO CLOCK CIRCUITS 



Start 




Sto 


F 


oiAiti/ oi Uir oiAlUo 

Q12 collector 






















TEMPO CLOCK 
Q15 collector 



















ICl pin 1 
ICl pin 2 

IC2 pin 4 
IC2 pin 6 
ICl pin 13 
ICl pin 12 



X 




Q16 ON (charge) 
FIGURE 9 TEMPO CLOCK TIMING DIAGRAM 



START/STOP & Tempo Clock 

When the power supply for TR-808 is turned on, the TEMPO clock 
continues oscillation regardless of the operation mode of TR-808. 
However, when the START button is pressed in the STOP nnode, 
oscfllation stops once for 9ms to provide a mode change preparation 
time to CPU. In this way, the START/STOP circuit and the TEMPO 
circuit are closely related with each other. When the SYNC IN/OUT 
switch is set to IN, both circuits become ineffective and externaf 
signals from the DIN socket duplicate the both circuits. 

When the_ START/STOP switch is pressed (closed) with rhythm 
stopped, Q of F/F IC2B becomes L,nhe collector of 01 2 becomes 
H, of IC2B becomes H and IC2A is reset. Q of IC2A becomes H 
and the collector of 015 becomes L. Then, since O of IC2B becomes 
H, pin 2 of ICl becomes L to turn on 016. As a result, the TEMPO 
GENERATOR of 2/4 ICl (D, E) stops oscillation (details are de- 
scribed later). After 9m$ later, pin 1 of IC1A drops below the thresh- 
old level and pin 2 is reversed. The rising edge reverses of IC2A to 
L and the collector of 015 (TEMPO CLOCK output) becomes H. 
At the same time, 016 is cut off, and CIO starts discharging through 
the ANTI-LOG 014 to continue oscillation. 

This discharging speed of CIO determines the oscillation frequency of 
the TEMPO clock. The variation range is between 8.3ms and 65ms. 
With TR-808, J is defined to have 24 clocks, and thus I is 
approximately equal to 400—300. 

When the level of CIO exceeds the threshold level of pin 13 of ICl 
due to discharging, the output of pin 10 is reversed, 016 turns on, 
and CIO is charged. The output of pin 12 of ICl is divided into 1/2 
byT-FFof IC2A. 




^ 



= 



rn 



21LJ R.l-e2- C/-C2. 

FIGURE 11 REPRESENTATIVE BRIDGED T-NETWORK 



E^y ELOPE 




zz 



OUT 

-o r 





FIGURE 10 POWER ON/OFF DETECTOR 



HUTIK)^ 



Muting, Reset 

The circuit composed of 010—012 detects power on/off or sharp 
voltage drops in TR-808 DC lines and feeds forward bias (0 volts) to 
FET switches connected to point A. These FETs are for resetting 
CPU (064), preventing writing into RAMs (075) and muting Master 
Out (013). 

Power on : OV 1 -2sec - 1 5 V 

Power off: -15VtoOV 

If this circuit is defective, the CPU may be kept reset. (Detail in 
TROUBLESHOOTING on page 14.) 



D 
C3 ^ 



FIGURE 12 REPRESENTATIVE SWING TYPE VCA 



Sound Generators 

The bridged T-network filter shown in Fig. 11 is used to generate 
periodic damping drum sound. This configuration has variations 
according to application (instrument sound). Values of R and C 
can be changed. With this circuit, the decay time becomes longer as 
O increases. 

The swing type VCA shown in Fig. 12 is used to generate metalic 
sound (noise). This circuit features its output waveform having 
many high harmonic components to provide ringing metalic sound. 

Major features of each sound generator are described below. 



Bass Drum 

This sound generator is composed of a multi-feedback, bridged 
T-network including 1/2 IC12 (pins 1-3) as an active element. The 
decay time of the resonating waveforms can be controlled by ad- 
justing feedback amount by VR6. 

Immediately after a trigger pulse is fed into the generator, the filter's 
time constant - when ACCENT is present - is halved and has a 
resonance on twice its inherent frequency for a half cycle period, 
then on the fixed frequency with decaying amplitude. This changing 
frequencies will sound a punchier crisp bass. This trick is performed 
by the circuit composed of 041—043. 

When a trigger signal is outputted from the collector of Q40, 041 
turns on, 042 turns off, 043 turns on and R165 is shorted. This 
halves the time constant of this network. The ON period of 043 
is determined by R156 and C38 and equals 4ms which is 1/2 x 1/2 
of 16ms of the inherent oscillation period of the filter. 
When 042 tgrns on after 4ms, current discharging from C39 via 
R161 produces a retriggering pulse. At this time the generator oscil- 
lates on the inherent frequency. 



TR-808 



JUN. 15,1981 



Snare Drum 

This sound generator has two bridged T-networks for fundamental 
waveforms and harmonic waveforms. The output ratio of the two can 
be changed by VR8 to tailor sound characteristic. The amplitude of 
snappy envelope can be controlled by VR9. 



LT/LC (MT/MC, HT/HC) 

These three sound generators are composed of the circuits based on 
the same principle. LT/LC is described below as an example. 

This sound generator is composed of a multi-feedback, bridged T- 
network including IC5 as an active element. Voices are switched by 
SW8 (C77 -frequency, R224- level). While the oscillation is large 
in amplitude immediately after triggering, it is on a higher frequency 
due to conductions of D80 and D81, which reduce time constant of 
the filter. As the resonance is damped, its frequency is lowered by 
the effect of increasing diodes' internal resistance. Timbre variations 
corresponding to time elapse will appreciably be heard as in the case 
of Bass Drum. 

Pink noise with a slightly longer decay time is mixed for Low Tom 
Tom to provide artificial reveberation. 



RS/CL 

CL Output from multifeedback bridged T-network incorporated 
with IC20 is routed to IC19. Output from IC21 (for RS), also routed 
via R320, can be ignored because of its minimized level due to im- 
pedance imbalance at pin 7 of IC20b. 

RS Disconnected R313 makes IC20b just as a buffer for CI20a 
output. The output of IC20b is applied to 062 together with the 
output of IC21. The envelope applied to 062 is formed by R107 
and C24. As described in the beginning of this section, VGA of this 
type is intended to provide many high harmonics in the output 
signals. 

Normally-conducting 074 remains off only while trigger pulse is 
transferred from 061 to allow IC19 to pass signals. This switching 
is provided to eliminate noise leaking from IC20, especially for 
CL — relatively large amount, being wired for high O. 



CP/MA 

White noise passed through the band pass filter (IC21) is applied 
to two VCAs in parallel to have different envelopes. These envelopes 
are combined tp obtain sound source for the CP sound generator. 
Since an envelope with a relatively long decay time is applied to the 
VGA O70, output from this VCA constitutes reverberation of CP 
sound. 

The output envelope at the VCA (IC22, 071 and 072) is a unique 
sawtooth shape, and is a main component of this sound generator. 
The sawtooth envelope generator circuit is mainly described below 
to explain its rather complicated operation. When trigger pulses are 
applied to pin 8 of the quad comparator IC23, the output is inte- 
grated by R350 and CI 40, and converted into pulses of 30ms wide 
as shown in Fig. 13-2. At the falling edge of the pulse, pin 13 of 
IC23 becomes H (Fig. 13-3). The output from pin 1 of IC23 is also 
applied to pin 4 of IC23, pin 2 of IC23 becomes from -15V to OV, 



IC23 OV 

pin 14(7) 



~15V 



1 



IC23 

pin 1(10) 



OV -- 



30ms 



-15V 



IC23 




C144 


\J V 




-15V 


IC23 
pin 2 


OV 
. -15V ^ 


IC23 
pin 5 


OV - 




■15V 




IC22 pin 8 




FIGURE 13 HAND CLAP GENERATING CYCLE 



073 turns on, pin 5 of IC23 becomes —15V, pin 2 of IC23 returns 
to —15V, and 073 returns to off state. Accordingly, the output 
waveform at pin 2 of IC23 becomes narrow pulses as shown in Fig. 
13-5, 

The moment 073 is turned on, C144 is abruptly charged to —15V. 
However, immediately after charging, 073 turns off and the charges 
are discharged through R365 and D71. When the level of pin 5 of 
IC23 becomes higher than the level of pin 4 due to discharging, pin 
2 of IC23 reverses again and C144 is recharged to —15V. After this 
process is repeated and advanced to the middle of the third time, 
pin 1 of IC23 rises to OV. This signal is differenciated by R357 and 
C141, and the generated pulse turns on 073. At this time, although 
the terminal voltage of C144 rises gradually from —15V due to 
discharging, pin 2 does not reverse since pin 4 of IC23 has reached OV. 
The output (Fig. 13-4) of this envelope generator is applied to the 
base of 072 and converted exponentially by 072 together with the 
signals applied to the base of 071 (offset adj. signal from TM3 and 
accent signal via D68, C143 and R362. The converted signal is applied 
from the collector of 072 to pin 1 of IC22 to change the amplitude 
of noise from the filter IC21. 

Note: IC23 (AN6912) is constructed with open collector NPN transis- 
tors for output and operates on single (negative) power only. 



MA White noise is gated by 065 and supplied to the same buffer 
IC19 as for the CP sound generator through the filter 068. Envelope 
for MA sound generator is generated by 066 and 067. 



CB 

This sound generator uses the outputs of two square waveform 
oscillators with different frequencies (by Schmitt triggers). Each 
oscillation output passes the corresponding exclusive gate (VCA, 
014,015) and mixed by the filter IC2. 

A series of R82 and C34 connected in parallel with C9 forms an 
envelope having abrupt level decay at the initial trailing edge to 
emphasize attack effect. 



CY 

The combined square wave outputs of six Schumitt triggers including 
two for CB generator is separated into high and low range components 
by two filters composed of IC3. The high range component from pin 
7 of IC3 is further separated into two frequency ranges. The output 
of the gate 016 has the highest frequency component of this sound 
generator. Its decay time is short. The output of 017 is in a frequency 
range slightly lower than the above output, and its decay time is 
controllable. 

These three signals with different frequency ranges are outputted 
with their level ratio controlled by VR4. 



OH 

The high frequency range component signal obtained by the above 
1/2 IC3 is gated by 027 and supplied to the buffer IC7 through the 
filter 026. When the CLOSED HI-HAT (CH) is triggered while the 
OH circuit is activated, 023 turns on by the voltage applied through 
R173. At this moment, the decay time of the OH circuit terminates. 



CH 

This shares the same sound source with the OH. The signal is gated 
by O30 and supplied to the filter 031 and the buffer IC7 (1/2). 



6 



JUN. 15, 1981 



TR-808 




TR-808 



JUN.15,1981 



JACK-A 



MAIIM BOARD °^ 3niB-T30 



FROM POWER SUPPLY 



TRIG 




NOTE: UNLESS OTHERWISE SPECIFIED 

ALL NPN TRANSISTORS ARE 2SC9i+5(P) 
ALL PNP TRANSISTORS ARE 2SA733(P) 

Q25~Q26 2SA1015(GR) 

ALL DIODES ARE 1S2473 

ALL OP AMP'S ARE }iPCk3%C 



7C400/BCP f^^;:^;^^) 



JUN. 15, 1981 



TR-808 



TRIG 



SNARE DRUM 



CK) 



Q46 



C. p. TRIG 



CK>0 



Q29 



9:0-^ 




SWI2, 



PORTION CHANGED 

S D 

C58 .027 to .056 
C61 .0068 to .015 
R191 8.2k to 10k 
R200 47k to zero 

C P 

10k (called R200) is 
connected across -15V 
line and Q70 emitter. 



TR-808 



JUN. 15,1981 



SWITCH BOARD 
OP3116090 (7311609000) 
(pcb 291-402) 



MAIN BOARD 

OP3116-130 (7311613006) 
(pcb 291-400A) 



COMPONENT SIDE 



U) 



n 

I 







© 



mm ' I 


,ft 



- LI 


11 Hp I 


1 






m 



Q 



v.. >:■ \t^x~~\^ 


f '■*:!« 


Hi! 





'O 



Itl" 



m 



to 



1? .JHHL,.,. 

■«™ 1 1 1 -^ 
<Z> ■^ 1 1 1 -0 


ill«i*M; 


M. 



ill ;HI 1 
illlU 


1 



o 



jS1 


111 



Tin 



i|'ii 


if im 


llH 1 


yliyi 



Q 



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iSi 



CD 

O 

ro 

I 

cr^ 



-p- 
I 

03 

o 



ro 

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no 

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00 

W 




10 



JUN. 15, 1981 



TR-808 



MAIN BOARD 
OP3116-130 (7311613006) 
(pcb291-400A) 

FOIL SIDE 




JACK BOARD A 
OP3116-100 (7311610000) 
(pcb 291-403) 



JACK SG7622 3lt't-106 




11 



TR-808 



JUN.15,1981 



POWER SUPPLY 

PS3116-051 (7311605100) 100/117V 
PS311 6-054 (7311605400) 220/240V 

(pCb291-405A) 



iiBisiiiissiiiiSiS 



o 



© 




9 II 



n 12 13 lif 



JACK BOARD B 
OP3116-110 (7311611000) 

(pcb 291-404) 



,iill 






l&kjD* 



I %sr£m 



^iNzgJi 



D 



D 



D 



! m 



S ftkt|)i» 







i 



M 



D 

D 
n 



22 
21 
20 

19 
18 
17 

16 
15 



COMPONENT SIDE 



VOICING BOARD VG3116-140 (7311614001) 

(pcb 291 -401 A) 



FOIL SIDE 




C!. 

40 



"3 



Rt72 C89 
VR8 

im 






ic 

7 



OH 

30 
* _ * 

CSa PI69 C87 

LEVEL 

VR7 



3D 

^5 



CY 

20 

C86 RI66 C85 
LEVEL 
VR6 






O 



Rt55 C74 cc 

Q ^ i;^' I 1 

""153 _, 
C72 



O 

110 



io 



>3 



m 

^ rt 5 G 

(0 06 CO 5 



CB G 

•o 

C84 R 163 
LEVEL 
VR5 



1 1 ] 



C73 HH 



B« -D14 

IS2 — 

C70 it- 

R - 

C69 -"^ 
R142 — 
RI4J - 
RI39 — 






TONE 
VR4 



^ 



146 
68 

HI- 
145 



1 t t 

155 _ 

Rill 



J— 



C55 



Ul 



Q30 

^OZS -II" ^^ <5 

^ C65 C64 <0 

m ,-,2 DECAY 



*0/ 1 — 



' ' ' RII3 



R 

110 



RI27 



-I t5 

00 



(D 



% 



VR3 






DECAY 
VR2 

fin 



a) U 3I3)[ )[ ) 



00 00 



<O00 O D 3D 

N N c3 

I I CJ IS) !E! 



Ul 

I i t 



— J- 



?3 

CO N 



-J- :o 

(0 0) (0 (D 



I O 

I K) 

I 0) 



o 



2» §( ] 



I I I I I 



- o 



-"- C52 Oxg 

Hh C5I ^^ *^ 

2 C49 

3 ^J- C50 -i»" ^ 
^ R 

Hh C48 — 106 

_ |_ HI- 

^ C47 

RI03 

— R102 

2 -"'^"^T- ««^o 

2 -J- ^f* - R99 
-DM- p^ ^__^ 

C43 ^»- — ^, Q17 

R97 ^^^ 

C42 HH — — R96 

*-> R94 R95 — ! QJ6 



46 
101 



0) 
00 



OU 



'6 



-DIO- 
-09- 

10 i — J — 
X7 



MASTER 



VR I 

m 



— -D5- 

Hh -J- 






6 MIX 
O »N 



2tS5+ iStOgtSi 40 <^3^ -_R33 
- I t S «J| sj ^ iO 01 

* I ^ 29 IP 

I :^ l( )t. I ' * I ^ O 



D4-" R32 



SW2 



■3 1 MUTING ^^' 



-f„| Tjj^q CI6 HH 

R59 — 






— J- 



3Df I 2 



R58 



C30 HI- 

Hh CI4 R26 — 

— RS7C29 Hi- 
ih CI3 R25 — 

— R56C28 Hi- 

R24 - 



R23 



to. 

O Oi 



5l::il( |qi2 



R6S I 



<[)^aiiSii 



W (0:r 



3 1 ±0.1 5 Q- D- 

^ ' * ' a TP7 R45 TP6 



§C)i|*3 



(li 



QIO 




R44 
C6 

Hi- 
es 

Hl- 

C4 
R43 



2 

C3 

T _ 



I 
C 



,0 R3' 

-HI- C3I "^ ^_ QI4 
-03- 
- R30 
-J- _ 

1 

— 22 

— 21 

— 20 

— 19 
-Dl- 



I 



—J 



-D2- 

;C9 — 

-J- 



9^ 9Z 



RI22 _ 
^6 ^^RI8 
05 



IC 




I 


CI Hl- 
7K- 



'-^ ^S- RI5 PI4 
R39 RI7 RI6 ;i 02^01 

R37 3b5»^5<*> '( J '( J 

- ^"^ro R4 

R35 



-J — 



m 



t^ R3 

R2 
Ri 



12 



JUN.15,1981 



TR-808 



POXA/ER SUPPLY 



JACK-B 




HD 14584 



13 



TR-808 



JUN. 15,1981 



ADJUSTMENT 



ADJUSTMENT 


Connect 


Set 


Adjust 


Reading 


CPU CLOCK 


scope to 
TP-1 




IFT-1 


2us/c.ycle(500kHz) 


check 


4V p-p 


INT 
CLOCK 


scope to 
TP-2 




TM-1 


1. 9ms/cycle 


TEMPO 
CLOCK 


scope to 
TP-3 


TEMPO. FINE :FCW 


TM-2 


8. 53ms/cycle 


TEMPO: FCCW 
FINE : FCW 


check 


65ms+5nis/cycle 


NOISE 
GENERATOR 


AC volt- 
meter to 
TP-4 




TM-4 


130mV rms 


CP (HAND 

CLAP) 

OEESET 


scope to 
TP-5 


V7rite, play CP 
at a tempo w/ 
LEVEL FCW 


TM-3 






CB (COW 

BELL) 

FREQUENCY 


scope to 
TP-6 




TM-1 


1.85ins/cycle 


TP-7 




TM-2 


1. 25ins/cycle 






d 



CHECKING VOICES 

- Refer to right-hand table - 

Connect scope to the MULTI OUT jack of a VOICE. 
When observing amplitude, set ACCENT LEVEL to FCCW position 
ard the VOICE LEVEL to FCW, then turn ACCENT FCW. DECAY, 
TONE, etc. for that voice must be set at 12 o'clock. 




iO Vp 



TROUBLESHOOTING 

This section describes funda- 
mental approach to isolate 
defective circuits or compo- 
nents . 

Although most TR-808 circuits 
function under the CPU control, 
possible reasons will often be 
found on peripheral circuits. 
Replace CPU last of all. 
Some useful information can 
be derived from the circuit 
description. 







AMPLITUDE 


FREQUENCY 


DECAY TIME 




NORMAL 


ACCENT 


LOW 


MID 


HIGH 


SHORT 


MID 


LONG 


Vpp 


Vpp 


ms 

(Hz) 


ms 

(Hz) 


ms 

(Hz) 


ms 


ms 


ms 


BD 


3.5 


10 


— 


18 

(56) 


— 


50 


300 


800 


SD 


H 

L 


3 


10 


— 


2.1 
(476) 


— 


— 


60 


— 


4.2 

(238) 


LC 


3.5 


12 


6.1 
(165) 


5.4 

(185) 


4.5 
(220) 


— 


180 


— 


LT 


3.5 


12 


12.5 
(80) 


11.1 

(90) 


10 
(100) 


— 


200 


— 


MC 


3 


10 


4 
(250) 


3.6 
(280) 


3.2 

(310) 


— 


100 


— 


MT 


3 


11 


8.3 
(120) 


7.4 

(135) 


6.3 
(160) 


— 


130 


— 


HC 


3.5 


12 


2.7 

(370) 


2.5 
(400) 


2.2 

(455) 


— 


80 


— 


NT 


3.5 


12 


6.1 
(165) 


5.4 

(185) 


4.5 
(220) 


— 


100 


— 


C 


2.5 


8 


— 


0.4 
(2500) 


— 


— 


25 


— 


RS 


H 
L 


3 


10 


— 


0.6 

(1667) 


— 


— 


10 


— 


2.2 

(455) 


M 


3 


5 


— 


— 


— 


25 


— 


35 


CP 


6 


2 


— 


— 


— 


— 


100 


— 


CB 


H 
L 


3.5 


12 


— 


1.25 
(800) 


— 


— 


50 


— 


1.85 
(540) 


CY 


3.5 


7 


— 


— 


— 


350 


800 


1200 


OH 


3.5 


7 


— 


— 


— 


90 


450 


600 


CH 


3 


6 


— 


— 


— 


— 


50 


— 



DC SUPPLY 

Confirmation of DC supply voltages is the first thing to 
be done in troubleshooting. Check +5V, +15V and back-up. 
CPU is forced to reset and is not allowed to restart when 
DC source is so irregular that Voltage Change Detector 
keeps reset signal. 

Lower impedance load connecting to voice output jack can 
draw relatively large current through op amp when the 
scund level is high. The sum of the currents, when many 
louder voices are outputted in step, flowing into these 
loads would cause DC source to drop enough below the De- 
tector sensing level. To make sure of this, pull all 
plugs off the jacks. Contrast to the above is a short- 
circuitting IC . One short circuit in a stage only could 
not be sensed by the detector since "B" supplied to a 
particular circuit group is independently filtered, or 
rather, the short circuit will increase ripples in the 
line, causing TEMPO CLOCK to be unstable. 



STATUS, SWITCH SCANNING 

Each port at PH routes scanning signal to the switches 
connecting to its bus. PA and PB read signals coming via 
the switches. If a switch is misread, check scannings for 
other switches: one sharing the same PH bus, one sharing 
the same input port - with corresponding switchings. 



RAM STORED DATA 

As shown in memory map on page A, a RAM is partitioned 
into blocks. It is unlikely to occur in a RAM that only 
one block fails to handle data when the RAM or the De- 
coder malfunctions. For example, if all instrument data 
but Cow Bell enter IC8, similar phenomenon might true to 
other RAMs , were the troubles through PC-0 bus. 



TRIGGER PULSE 

Lack of trigger pulse from a gate is not what Common 
Trig is responsible for, when other sound generators are 
fired . 

Common Trig with pulse width longer or shorter than 1ms 
will be a cause of deteriorative voices. 



values are typical and variable 



14 



JUN. 15, 1981 

DESIGN CHANGES 8e IMPROVEMENTS 

The reasons for modifications will help to remedy the problems as 
described below, may be found on early TR-808 . 

Some of the modifications were done at the factory on some products 
bearing serial number earlier than indicated: 

MAIN BOARD - modification 1, 4 

VOICIN(} BOARD - modification 1 



MAIN BOARD 



TR-808 





EPPECTIVE WITH 
SERIAL NUMBER 


PART AFFECTED 


REASON (* SOLUTION) 


1 


000300 


INT CLOCK 

ICI (HD14584) 


Variations in HD14584 hysterisis 
sometimes deviate Clock Rate out of 
specified frequency range. 

* To down - 0.047+0.039 in parallel 

* To up - remove 0.039 


Cll 0.068- 






(C203) 


2 


010600 


CP (Hand Clap) IC21 
R346 IK > 680 


CP sound overmatches the rest in level. 

* Reduce the gain 

(Both proper and reverberation 
components . ) 


iVjj^ ^^Iv ^ iL 1 K 


3 


010600 


CPU (pin 30) 

"P01 1 '^V ■^IM 


Small resistance allows CPU to draw 
relatively larger current from back- 
up batteries with MODE selected other 
than PLAY or MANUAL PLAY in Power OFF. 
* Increase resistance 


IX y J- ±Ji\. -* -LH 


4 


010600 


DIN SOCKET 

(pin 5) 

R25 220K >1.5M 


Reject unnecessary signals from 
external circuitry to prevent false 
triggering at subsequent stage. 
* Increase resistance 


CPU (pin 37) 
Capacitor 0.01 across 
DIN pin 2 and chassis 
Grounding 


Protect CPU against static electricity 
build-up at external circuitry. 
* By pass charge 


5 


010600 


NOISE GENERATOR (IC24) 

R129 330K > short 

R311 330K >100K 

R127 4.7K->10u(C200) 
C202 >22p 


Variations in UPC4558 bias current 
are transferred to 1/2 IC24 output as 
an offset reducing gain margin. 
"^ Decouple DC 



MAIN BOARD cont'd 





EFFECTIVE WITH 
SERIAL NUMBER 


PART AFFECTED 


REASON (* SOLUTION) 


6 


010600 


VOICE GATE 

R106, 1^154, R182, R213 , 

R242, R268, R298 

22K > lOK 


Ensure sufficiency of gate drive signal 
voltage at lower COMMON TRIG amiplitude. 

* Increase gain 


7 


010600 


COMMON TRIG 
IC6 (TC4011BP) 


High frequency from CP generator induces 
irregular oscillation on other generators 
triggered at the same time. 
* Filter out CP high frequencies 


-l1_LUX -LUiV y> ±UUlv 

C201 >22p 


8 


020800 


START/STOP (IC2) 
CPU (pins 7, 31) 

Q64,Q75 >FET 

R127 >6.8K 

R54 IM >100K 

D32 1 >0 


Prevent possible disturbance in RAM 
memories at power on/off switchings 
with MODE set at other than PLAY or 
MANUAL PLAY. 

* Add PET switches 


9 


031100 


LED 

OTTiT o -] -] p,rj N TT T? 1 '^i '1 


Eliminate possible chance of LED D76(D78) 
being lit by base current of Q5(Q2). 
* Use low sensitive LED 


ioJi-U^_LJ.U-Lt > ±-ljiL±(^'-|- 



VOICING BOARD 





EFFECTIVE WITH 
SERIAL NUMBER 


PART AFFECTED 


REASON {* SOLUTION) 


1 


000300 


COW BELL (ICI) 

C6 0.01 >0.022 

R44 390K >150K 

n / rr -F -z r\Tr •^ -\ r\r\j7- 


Difficulty in setting COW BELL sound 
frequency within the specified range. 

^ Extend TMl and TM2 control range 




2 


010500 


Q1-Q4 


To have a clearance between Switch 
Board and transistors' top. 

* Employ transistors in shorter package 


tLyJ^\ji\-'ji. ^ ^0"^<^U^J-iL 


051850 


Q5-Q8 


i^)OJ±ljjL ^ ^uA)jj IW. 



15 



TR-808 



JUN. 15, 1981 



PARTS LIST 



PANEL 














2221024200 


Panel 






N-242 


top 




2112511800 


Panel 






N-118 


side (L, 


H) 


2112511900 


Panel 






N-119 


side (R, 


H) 


2281023401 


Chassis 






N-234 






111-021 


Rubber 


Foot 


G-5 




rear 




111-023 


Rubber 


Foot 


G-7 




front 





SOCKET 

13429604 
13449106 



Din connector 
Jack 



TCS0250-O1-O3 
SG7622 #8 mono 



TRANSFORMER COIL 

2245021 7N0 Power transformer N-217N 100V 

2245021 SCO Power transformer N-218C 117V 

22450219DO Power transformer N-219D 220/240V 

12449217 IFTColl S74230 yellow CPU clock 



SWITCH KNOB 



(O66HO21: 



(009-012) 



13129101 


SDG5P-001 


power 


100V 




(001-215) 


13129102 


SDG5P-001 


power 


117V 




(001-216) 


13129103 


SDG5P-502 


power 


220/240V 




(001-217) 


13119508 


SRM1026 


rotary 




mode, auto fill in 


- 


13119806 


SRM101C-C 


rotary 




instrument/track 


- 


13139129 


SLE62301 


lever 




basic variation 


- 


13139128 


SLP62208 


lever 




l/F variation 


- 


13159503 


SQPR24-12P 


'slide 




pre -scale 


(001-228) 


13159105 


SSP04205 


slide 




instrument 


(001-293) 


13159fl2 


SSF22-07 


slide 




sync 


- 


13129901 


DS102#44 


push 




clear 


(001-045) 


13129711 


KED10001 


key 




start/stop 


- 


13129703 


KED10903 


key 




tap 


(001 -299) 


13169601 


KHC11901 


key 




step number 


- 


224701 2700 


Knob 




N-127 




(016-077) 


224701 2800 


Knob 




N-128 




(016-078) 


2247016500 


Knob 




N-165 




- 


2247516700 


Knob 




N-167 


white 


(016H010) 


2247516800 


Knob 




N-168 


orange 


(016H012) 


2247516900 


Knob 




N-169 


yellow 


(016H017) 


2247518000 


Knob 




N-180 


red 


(016H018) 


2247050600 


Button 




N-506 


black power switch 


(016-009) 



SEMICONDUCTOR 
LSI 

15179116 MPD650C-085 CMOS CPU 

15179305 MPD444C CMOS RAM 

or HM4334P-4 (compatible) 



10 

1 5229802 

15159101ZO 

15159104TO 

1 5i 591 05TO 

151591 13Z0 

151 59303 HO 

15189113 

15199110TO 

15199106FO 

15189105 



BA662A 

MC14001BCP 

TC4011BP 

TC4013BP 

MC14051BCP 

HD14584B 

AN6912 

TA7179P 

MA7805UC 

JUPC4558C 



Vari-conductance amp. 
Quad 2-input NOR gate 
Quad 2-input NAIMD gate 
Dual type D flip-flop 
Analog multi/demultipxr 
Hex Schmitt trigger 
Quad comparator 
±15V Regulator 
-H5V Regulator 
Dual op amp 



TRANSISTOR 




15119105 


2SA733 (P) or (Q) 




15119113 


2SA1015 (GR) or (Y) 


15119806 


2SB596 (0) 




151291050A 


2SC828 (R) 


selected noise 


15129108 


2SC945 (P) or (Q) 




15129121 


2SC2021 (R)or(Q), (S) 


15129815 


2SD880 (0) 




15139101 


2SK30ATM (Y) 


FET 


15139103 


2SK30ATM (GR) 


FET 


LED 






15029103 


TLR124 red 




15029119 


SEL2110R red 


S/N up to **1( 


DIODE 






15019120 


IS2473 


Si diode 


15019122 


IS188FM 


Ge diode 


15019236 


W-02 


rectifier stack 


15019209 


10E-2 





POTENTIOMETER 



13219310 


EVH-LWAD25B52 


500i2 (B) 


LT, MT, HT tuning 


- 


13219311 


EVH-LWAD25A53 


5K (A) 


CB level 


- 


13219312 


EVH-LWAD25B14 


10K (B) 


AC level, SD, snappy 


- 


13219313 


EVH-LWAD25C14 


10K (C) 


BD tone 


- 


13219314 


EVH-LWAD25B24 


20K (B) 


CY tone 


- 


13219315 


EVH-LWAD25A15 


100K (A) 


level 


- 


13219316 


EVH-LWAD25B15 


100K (B) 


SD tone 


- 


13219317 


EVH-LWAD25B55 


500K (B) 


BD decay 


- 


13219318 


EVH-LWAD25B26 


2M (B) 


CY, OH decay 


- 


13219233 


VM10RB10C 


50K (A) 


master vol. 


(028-751) 


13219219 


VM10RB10C 


50K (B) 


fine 


(028-762) 


13219761 


GM70EF51E 


10K (B)x2 tempo 


- 


13299114 


H1051A013 


10K (B) 


SR19R trimmer 


(030-465) 


13299115 


H1051A015 


22K (B) 


SR19R trimmer 


(030^67) 


13299117 


H1051A019 


100K (B) 


SR19R trimmer 


(030-471) 


13299119 


H1051A021 


220K (B) 


SR19R trimmer 


(030^73) 


RESISTOR 










15229909 


ERSC33G561 


56012 




— 


FUSE, FUSE 


HOLDER 








1 25591 04 


SGA 0.5A 


pri. sec 


100/1 17V 


- 


12559508 


CEE 250mAT 


pri. sec 


220/240V 


- 


12199519 


Fuse clip TF785 






(012-003) 



CIRCUIT BOARD ASSEMBLY 



7311613006 
7311614001 
7311609000 
7311610000 
7311611000 
7311605100 

7311605400 



CAPACITOR 

13639932JO 
13589453MO 

1 35894 54MO 



MAIN BOARD 
VOICING BOARD 
SWITCH BOARD 
JACK BOARD (A) 
JACK BOARD (B) 
POWER SUPPLY BOARD 
(100/1 17V) 

POWER SUPPLY BOARD 
(220/240V) 



0P31 16-130 
VG31 16-140 
0P3 116-090 
OP3116-100 
OP3116-110 



(PCB 291 ^OOA) 
(PCB 291 ^01 A) 
(PCB 291^02) 
(PCB 291^03) 
(PCB 291-404) 



PS3116-051 (PCB291-405A) 



PS3116-054 (PCB291-405A) 



SL25VB10BP 
ECQ-UC1A473MC 
100/1 17V 
ECQ-U2A473MF 
220/240V 



10|uF 25V 
0.047mF 

0.047m F 



non-polar 
polypropylene 

polypropylene 



TERMINAL 

13439119 
13439122 
13439123 
13439124 
13439110 
13429121 
13459101 



WIRING ASS'Y 

2341021000 
2341021100 
2341021200 
2341021300 
2341021400 
2341021500 



5045-O3A 

5045-06A 

504 5-0 7 A 

5045-08A 

3022-1 2A 

FH1-12S-2.54DS 

TT501 D-1 2P power cord 



(042-039) 



N-210 


3P 


N-211 


3P 


N-212 


6P 


N-213 


7P 


N-214 


7P 


N-215 


8P 



OTHERS 












2246010101 


Heat sink 


N-101 






(048-001 A 


2215051700 


Long nut 


N-517 


3x8mm 


(120-042) 


2215050100 


Long nut 


N-501 


3x10m 


m 


(120-001) 


2215050200 


Long nut 


N-502 


3x16.4mm 


(120-002) 


2215050300 


Long nut 


N-503 


3x18m 


m 


(120-003) 


2215052400 


Boss nut 


N-524 


3x8mm 


(120-052) 


2219525600 


Holder 


N-256 




power switch 


(064H076) 


2219024600 
2219024700 


Holder 
Holder 


N-246 
N-247 




main and voicing boarc 


1 


2219024802 


Holder 


N-248 




battery holder 


- 


2219510600 


Holder 


N-106 




Potentiometer 


(064H055) 


2219510800 


Hplder 


N-108 




Power cord 


(064H074) 


2219510900 


Holder 


N-109 




Power cord 


(064H075) 


12199525 


Battery holder 


N-525 






- 


2224011500 


Dust cover 


N-115 




lever switch 


(065-261) 


2224010200 


Dust cover 


N-102 




slide switch 


(065-065) 


2202015901 


Battery cover 


N-159 






- 


2202016200 


Shield cover 


N-162 




main board 


- 


2202061201 


Protect cover 


N-612 




top panel 


- 


2202061701 


Protect cover 


N-617 




- 


2226031000 


Cushion 


N-310 




battery cover 


- 


2216051100 


Fiber spacer 


N-511 




power cord terminal 


- 


1 2369504 


Bushing 


SR^N-4 




- 


12369511 


Bushing 


BU480' 


1 


power cord 


- 


12369410 


Cord fastener 


1702B 






— 



Roland has changed parts codings from 6-digit to 8- or 10-digit. 

"N" followed by abridged number should be used in new coding only. 

Ex-code is listed at line end for cross reference. 



16